Tag: de0-nano

FPGA to VGA with VHDL

Steve Baumann | July 1, 2016

The following code was inspired by the very good example of the youtube-user “Toni T800” I use the VGA-mode 800×600@72Hz because I can directly use the 50MHz-clock as

FPGA

My first FPGA – UART-Communication

Steve Baumann | June 30, 2016

My first steps in the world of FPGAs I did last week when I tried to implement an UART-interface to communicate with my PC. Because my DE0-Nano did

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